The present embodiments relate to electronic switching structures and more particularly to a random access memory switching structure for rapidly switching data from multiple input channels, each carrying interleaved data streams, to any one of a set of multiple output channels. Such data streams may be provided in various forms, where by ways of example such data are often provided in optical transmission systems. For example, optical systems are standardized such as in the synchronous optical networks (“SONET”) standard and the Synchronous Digital Hierarchy (“SDH”) standard, and these standards define various data formats, such of which are used as examples blow. In any event, such optical transmission systems may be improved by the preferred embodiments, as detailed below.
The present embodiments relate to switching of high-speed and relatively large data quantities, as are now explored by way of example in connection with FIG. 1. Specifically, FIG. 1 illustrates a stream of data in a known STS-1 format, where such a format is defined by the standard and used in SONET systems, and a comparable version also may be used in SDH systems. The STS-1 format transmits a serial stream of 8-bit bytes, and in the example of FIG. 1 two such bytes B0 and B1 are shown, where byte B0 spans a byte interval from t0 to t1 and byte B1 spans a byte interval from t1 to t2. Under the STS-1 standard, the data rate is defined at 51.84 Mbits/second and, thus, each byte such as byte B0 and byte B1 is transmitted at a byte rate of 6.48 MHz (i.e., 6.48 MHz×8 bits/second=51.84 Mbits/second).
To achieve greater data throughput as compared to STS-1, data is interleaved to implement other STS values, typically designated STS-x where x indicates the level of interleaving. In this regard, FIG. 1 also illustrates a stream of data in a known STS-3 format. Here, the value of x=3 indicates that three streams of data are interleaved into a single STS-1 byte interval, as also shown in FIG. 1. Thus, during the STS-1 byte interval from t0 to t1, three bytes from three different streams are shown as S00, S10 and S20, where the subscript “0” indicates a byte number for a corresponding stream number S0, S1, or S2. Thus, during the single STS-1 byte interval there are three STS-3 byte intervals corresponding to the bytes S00, S10 and S20, respectively. Similarly, during the STS-1 byte interval from t1 to t2, again three bytes from the three different streams are shown as S01, S11, and S21. Given this data format, one skilled in the art will readily confirm that the STS-3 format permits a data rate of three times that of STS-1, that is, equal to 3×51.84=155.52 Mbits/second.
Completing the illustration and discussion of FIG. 1, it further demonstrates yet another STS-x data format, namely, a stream of STS-48 data. From the preceding conventions and discussion, one skilled in the art will readily appreciate that the STS-48 data includes, for one STS-1 byte interval, 48 bytes of interleaved data from 48 different serial streams. Thus, by way of example, in the STS-1 byte interval from t0 to t1, FIG. 1 also illustrates a first byte from a first stream S00, followed by 47 additional bytes during that byte interval, each from a respective one of 47 additional streams, thereby concluding with the forty-eighth byte S470 as provided by a forty-eighth data stream. Thus, during the single STS-1 byte interval there are 48 STS-48 byte intervals corresponding to the bytes S00 through S470, respectively. Accordingly, the STS-48 format permits a data rate of 48 times that of STS-1, that is, equal to 48×51.84=2,488.32 Mbits/second, or a byte rate of 311.04 MHz.
Various architectures now use the STS-x formats for communicating data and, thus, various circuit designs have been developed for such systems. In this regard, one need in such systems is for switching circuits where STS-x inputs are provided and STS-x outputs are needed. Further, in addition to the use of interleaving STS-x streams to achieve higher data rates, another aspect sometimes related to such streams is the input of multiple channels of such streams, meaning each such channel provides the same STS-x format. For example, recall above that the STS-48 standard provides 48 bytes during a single STS-1 byte interval, and systems are now requiring the capacity to deal with multiple channels of such bytes. For example, one contemporary approach, and indeed as used by way of example in connection with the preferred embodiments described later, provides 128 channels. Accordingly, during a single STS-1 byte interval (i.e., 1/6.48 MHz), such a system receives 128 channels, each with a stream of 48 bytes, for a total of 128×48=6,144 bytes; in other words, each channel provides its own stream of data at a same time that the other 127 channels are providing their respective streams of data. In response, these systems are required to receive these inputs over an STS-1 byte interval and then during one STS-1 byte interval to select any input byte from any input channel and provide it to any STS-48 byte interval, within a common STS-1 byte interval, of any output channel. For example, in a particular STS-1 byte interval, a byte in STS-48 byte interval 0 from input channel 2 might be switched to STS-48 byte interval 17 of output channel 49, while also during that same particular STS-1 byte interval a byte in STS-48 byte interval 5 from input channel 12 might be switched to STS-48 byte interval 32 of output channel 105; further, also during this same particular STS-1 byte interval, there must be full flexibility in the destination of all other separates bytes during that interval, that is, from each separate byte stream of each separate input channel to be output to any STS-48 byte interval of any output channel. Typically it is also permitted to broadcast a single input byte to multiple STS-48 byte intervals of a single output channel or multiple output channels with the same, different, or multiple STS-48 byte intervals.
Systems for switching bytes in the manner introduced above with respect to FIG. 1 are sometimes referred to as space-time switching or time-spaced interleaved switching (“TSI”). The term “time” is used to suggest that a byte in one time period may be switched to a different time period, while the term “space” is used to suggest that a byte from one channel (or stream) may be switched to a different channel. Moreover, the integrated circuit devices implementing this function are sometimes referred to as switch-fabric chips and often use complex stages, where one or more stages will switch data bytes with respect to time while one or more other stages will such data bytes with respect to space. These approaches are often limited in speed or data capability, and they may require complex considerations relative to timing when multiple stages are involved. As another approach, multi-port memories have been used for data switching, but by definition such an approach requires multiple ports per memory storage cell. As a result, the area required to form the circuit increases as approximately the square of the number of ports. Consequently, as the amount of data to be shifted has increased with technology, the area required from a multiple port approach has become increasingly inefficient if not prohibitively expensive.
In view of the above, there arises a need to address the complexities and drawbacks of the prior art and the requirements for such switching systems, as is achieved by the preferred embodiments discussed below.